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Description:
torii 0.6.0
Torii-HDL
Torii is a fork of Amaranth HDL that has been modified for use at Shrine Maiden Heavy Industries. It has merged several of the components that were separate into a single package, and also adds new functionality, as well as some internal changes for better integration into tooling.
The evaluation board definitions have also been migrated and are located in the torii-boards repository.
There is also a list of projects using Torii that are using Torii, and we'd love to add yours too!
Introduction
Please see the Torii Introduction on the online documentation
Installation
Please see the installation instructions on the online documentation
Supported devices
Torii can be used to target any FPGA or ASIC process that accepts behavioral Verilog-2001 as input. It also offers extended support for many FPGA families, providing toolchain integration, abstractions for device-specific primitives, and more. Specifically:
FPGA
Toolchain
Proprietary
FOSS
Lattice iCE40
iCECube2
Yosys+nextpnr
Lattice ECP5
Lattice Diamond
Lattice MachXO3L
Lattice MachXO2
Xilinx 7-series
Vivado
Xilinx UltraScale
Xilinx Spartan 6
ISE
Xilinx Spartan 3A
Altera/Intel
Quartus
Quicklogic EOS S3
Yosys+VPR
License
Torii is released under the BSD-2-Clause, the full text of which can be found in the LICENSE file.
License
For personal and professional use. You cannot resell or redistribute these repositories in their original state.
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